An Integrated 802.11a Baseband and MAC Processor

John Thomson, Bevan M. Baas, Elizabeth Cooper, Jeffrey Gilbert, George Hsieh, Paul Husted, Aparna Lokanathan, Jeffrey Kuskin, David McCracken, Bill McFarland, Teresa Meng, David Nakahira, Samuel Ng, Mahesh Rattehalli, Jeff Smith, Ravi Subramanian, Lars Thon, Yi-Hsiu Wang, Robert Yu, Xiaoru Zhang

Abstract:

A 0.25 μm CMOS mixed-signal baseband and MAC processor for the IEEE 802.11a WLAN standard in 0.25 μm CMOS occupies 6.8 x 6.8 mm² and contains 4.0 M transistors in a 196-pin BGA package. Power consumption for transmit and receive is 326 mW and 452 mW. Additional data rates up to 108 Mb/s are supported.

Paper

  PDF (289 KB),   (c) Copyright 2002, IEEE

Slides

20 pages pdf

Reference

J. Thomson, B. Baas, et al., "An Integrated 802.11a Baseband and MAC Processor," International Solid-State Circuits Conference (ISSCC), February 2002.

BibTeX Entry

@inproceedings{thomson:isscc:2002,
   author    = {J. Thomson and B. Baas and others},
   title     = {An Integrated 802.11a Baseband and {MAC} Processor},
   booktitle = {IEEE International Solid-State Circuits Conference (ISSCC)},
   month     = feb,
   year      = 2002,
   pages     = {126--127, 451}
   }