Exploration of Fine-Grain Body Bias Control in Many-Core Processor Arrays

Bevan M. Baas
Brent Bohnenstiehl
Jin Cui

VLSI Computation Laboratory
Department of Electrical and Computer Engineering
University of California, Davis

Abstract:

Although fine-grain many-core processor arrays have demonstrated great increases in performance, energy efficiency, and area efficiency across many workload domains, methods to integrate the control and optimization of body bias into these arrays has not been well explored. We investigate circuits to implement per-core body bias, and simulate complex workloads to estimate the net benefits in a many-core processor array when body bias is jointly optimized along with per-core supply voltage and clock frequency scaling. Compared to a system utilizing per-core clock frequency and supply voltage tuning, adding per-core body-bias voltage tuning decreases energy dissipation by a mean of 22%–30% at the same throughput for four 900+ core applications.

Paper

Reference

Bevan M. Baas, Brent Bohnenstiehl and Jin Cui, "Exploration of Fine-Grain Body Bias Control in Many-Core Processor Arrays," IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Burlingame, CA, October 2018.

BibTeX Entry

@INPROCEEDINGS{baas:S3S2018,
   author    = {Bevan M. Baas, Brent Bohnenstiehl and Jin Cui},
   booktitle = {{IEEE} {SOI-3D}-Subthreshold Microelectronics Technology Unified Conference ({S3S})}, 
   title     = {Exploration of Fine-Grain Body Bias Control in Many-Core Processor Arrays},
   year      = 2018,
   month     = oct
   }

VCL Lab | ECE Dept. | UC Davis

Last update: Oct. 17, 2018