The Design of a Reconfigurable Continuous-Flow Mixed-Radix FFT Processor

Anthony T. Jacobson
Dean N. Truong
Bevan M. Baas
VLSI Computation Laboratory
Department of Electrical and Computer Engineering
University of California, Davis


The design of a highly configurable continuous flow mixed-radix (CFMR) 
Fast Fourier Transform (FFT) processor is presented.  It computes 
fixed-point complex FFTs and inverse FFTs (IFFTs), and utilizes a 
flexible addressing scheme to enable runtime configuration of the FFT 
length from 16-points to 4096-points.  A configurable block floating 
point (BFP) unit increases numerical performance.  Compared to a 
floating point Matlab FFT function, the accuracy of the proposed 
architecture is 80 dB for a 64-point FFT and 74 dB for a 1024-point 
FFT with random complex input data.


Presentation Slides


Anthony T. Jacobson, Dean N. Truong, Bevan M. Baas, "The Design of a Reconfigurable Continuous-Flow Mixed-Radix FFT Processor" IEEE International Symposium on Circuits and Systems (ISCAS), May 2009, pp. 1133-1136.

BibTeX Entry

    author={Jacobson, A.T. and Truong, D.N. and Baas, B.M.},
    booktitle={Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on}, 
    title={The design of a reconfigurable continuous-flow mixed-radix {FFT} processor},

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Last update: Sep. 27, 2010