An Improved Split-Row Thresholding Decoding Algorithm for LDPC Codes

Tinoosh Mohsenin
Dean Truong
Bevan Baas
VLSI Computation Laboratory
Department of Electrical and Computer Engineering
University of California, Davis


We present an improved thresholding LDPC decoding
algorithm which outperforms the Split-Row and original
Split-Row Threshold decoders with a small increase in hardware.
Simulation results show that the algorithm provides 0.27
0.50 dB coding gain over Split-Row, 0.100.20 dB over Split-Row
Threshold, and is within 0.080.13 dB of SPA. Compared with
the original Threshold algorithm the check node processor's gate
count is increased by 3% while total chip area is kept the same.




T. Mohsenin, D. Truong and B. Baas, "An Improved Split-Row Thresholding Decoding Algorithm for LDPC Codes" IEEE International Conference on Communications (ICC'09), June 2009.

BibTeX Entry

    author={Mohsenin, T. and Truong, D. and Baas, B.},
    booktitle={Communications, 2009. ICC '09. IEEE International Conference on}, 
    title={An Improved Split-Row Threshold Decoding Algorithm for {LDPC} Codes},

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Last update: Sep. 27, 2010