[VLSI Computation Lab]

The VLSI Computation Laboratory (VCL) is part of the ECE Department at the University of California at Davis. Our goal is to discover and develop novel contributions in high-performance, energy-efficient, and area-efficient VLSI computation with an emphasis on digital signal processing (DSP), multimedia, and embedded workloads, and new projects in datacenter and scientific (supercomputing) kernels.

Research is accomplished with a multi-disciplinary view of algorithms, architectures, arithmetic, functional units, circuits, VLSI design, applications, and software tools of both programmable and special-purpose processors. We are one of very few university groups in the world that design and fabricate programmable (and configurable special-purpose) processor chips. Our research is grounded in achieving the aforementioned goals on widely-used applications measured in our laboratory on advanced deep-submicron CMOS fabricated chips which we have designed.

We believe we have designed the #1 and #2 highest clock rate fabricated processors and likely the #1 and #2 largest deep-submicron CMOS chips ever designed in a university.

People of the VCL

Professor Bevan Baas

Graduate students
Jon Pimentel
Ph.D. Candidate
  • SAR image processing
  • Floating point architecture
  • Processor architecture
Jeremy Webb
Ph.D. Student
  • High-speed board design
  • Many-core VLSI
  • System interfacing
Brent Bohnenstiehl
Ph.D. Student
  • Processor architectures
  • LTE baseband processing
  • VLSI Design
Emmanuel Adeagbo
Ph.D. Student
  • Regular expression applications
  • Many-core tools
  • VLSI Design
Shifu Wu
Ph.D. Student
  • Image processing
  • Video compression
  • Algorithm design
Satyabrata Sarangi
Ph.D. Student
  • VLSI design
  • Circuit design
  • Hardware architecture
Timothy Andreas
Ph.D. Student
  • Many-core processor applications
  • Processor architectures
  • Digital design
Mark Hildebrand
Ph.D. Student
  • Processor architectures
  • Hardware design
  • Circuit design
Christine Watnik
MS Student
On leave
  • Viterbi accelerator
  • AsAP code scheduler
  • DSP C compiler backend
Undergraduate Researchers
Jonathan Earl
  • Motion estimation
  • Video processing
  • Many-core application development
Prof. Zhiyi Yu
Ph.D. ECE, Oct. 2007
Associate Professor
Sun Yat-Sen and Carnegie Mellon University

  • Network on chip
  • GALS clocking
  • AsAP 1.0 physical design
Prof. Tinoosh Mohsenin
Ph.D. ECE, Nov. 2010
Assistant Professor
University of Maryland, Baltimore County

  • LDPC algorithms
  • LDPC architectures and processor design
  • Many-core processor arrays
Dr. Anh Tran
Ph.D. ECE, Aug. 2012
Lead Hardware R&D Engineer
Cavium Inc., San Jose

  • On-chip interconnects
  • Multi-core architectures
  • VLSI DSP implementation
Dr. Zhibin Xiao
Ph.D. ECE, Dec. 2012
Senior Hardware Engineer
Software-in-Silicon R&D Group
  • Memory system design
  • Video and multimedia applications
  • Processor shapes and topologies
Prof. Aaron Stillmaker
Ph.D. ECE, Dec. 2015
Assistant Professor
California State University, Fullerton
  • Many-core architecture
  • Physical design
  • Parallel many-core sorting
Dr. Bin Liu
Ph.D. ECE, Sep. 2016
Software Engineer
Machine Learning Group
  • AES encryption
  • DVFS circuits and algorithms
  • Core scaling
Dean Truong
MS ECE, May 2010
  • AsAP2 architecture and chip design
  • DVFS circuits and algorithms
  • Programming tools
Ryan Apperson
MS ECE, Sept. 2004
Senior Electrical Engineer
Physio-Control R&D

  • Asynchronous data interfacing circuits
  • SRAM design
  • Full-custom CMOS layout
Omar Sattari
MS ECE, Sept. 2004
Software Engineer
    Allied American University

  • Address generation and branching
  • Programming assembler, config
  • FFT algorithm mapping

Mike Lai
MS ECE, Sept. 2004
Design Engineer

  • High-speed pipelined signed multiplier
  • High-speed modular signed adder
  • Full-custom CMOS layout

Mike Meeuwsen
MS ECE, April 2005
Hardware Engineer
Intel, Digital Enterprise Group

  • 802.11a algorithm mapping
  • Architectural enhancements
  • Instruction set design

Toney Jacobson
MS ECE, July 2007
Patent Associate
Fenwick & West LLP

  • Fast Fourier Transform (FFT) architectures
  • Digital system design
  • High-speed FPGA design

Eric Work
MS ECE, Sept. 2007
Software Engineer
Soft Machines

  • Arbitrary task to 2D mesh mapping
  • Software tool flow
  • CAD tools

Wayne Cheng
MS ECE, January 2008
ASIC Design Engineer
  • Dynamic voltage supply circuits
  • Dynamic voltage and frequency circuits
  • Transistor-level power simulations

Gouri Landge
MS ECE, December 2009
Intel, Digital Home Group
  • Video motion estimation architectures
  • VLSI 65 nm motion estimation accelerator
  • Programmable video processing hardware

Stephen Le
MS ECE, March 2010
Component Design Engineer
Architecture Simulation
Intel, Visual Computing Group
  • Parallel H.264 application development
  • High-speed parallel simulator
  • Tool integration

Lucas Stillmaker
MS ECE, September 2011
Graphics Hardware Engineer
Intel, Visual and Parallel Computing Group (VPG)
Intel Architecture Group (IAG)
  • Parallel application development
  • Parallel database sorting algorithms
  • Digital system design

Trevin Murakami
MS ECE, December 2011
Product Engineer
Intel, NAND Solutions Group (NSG)
  • Many-core simulator
  • Processor architectures
  • Digital signal processing hardware

Houshmand Shirani Mehr
MS ECE, June 2012
Media encoder design, Component Design Engineer.
Intel, Visual and Parallel Computing Group (VPG HW)
Media Group
  • Digital signal processing hardware
  • Low Density Parity Check (LDPC) Decoders
  • LDPC Algorithms

Nima Mostafavi
MS ECE, June 2014
Hardware Engineer
Microelectronics Group
  • Hardware design
  • DSP applications
  • Software tools

Michael Braly
MS ECE, December 2015
Product Engineer
New Product Introduction
  • Motion estimation engines
  • Video compression
  • Processor architectures
Undergraduate Researchers  

Henna Huang
BS ECE, June 2009
Ph.D. Student
  • Parallel H.264 application development
  • Multi-processor characterization
  • Tool development

Gary Chung
BS ECE, August 2009
Apple Computer
  • Embedded processor code development
  • File system design and implementation
  • Config design of 334-processor system

Brian Zimmer
BS ECE, June 2010
Ph.D. Student
UC Berkeley
  • MP3 decoder reference design
  • MP3 decoder implementation

Layne Miao
BS ECE, June 2011
Analog Design Engineer
Intel Corporation
  • AsAP2 board bring up
  • System characterization

Victoria Harvey
BS ECE, June 2012
Ph.D. Student
  • Many-core simulation
  • Application development
  • William Au Yeung,   BS ECE, June 2005
  • Tomoko Tsuruta,   BS ECE, June 2005
  • Jason Cheung,   BS CS, June 2005
  • Leo Chan,   BS ECE, June 2006
  • Bassem Saad,   BS ECE, June 2006
  • Daniel Gurman,   BS ECE, June 2006
  • Sam Lee,   BS ECE, June 2006
  • Chi Chen,   BS ECE, June 2006
  • Kyle Piper,   BS ECE, June 2007

Current Research


In The News

Projects for Interested Graduate Students

Downloadable Tools Developed in the VCL

General Informative Web Pages

VCL-Specific Material

Laboratory Resources

Some of the CAD and Other Tools We Use

Computing Resources

Other Useful Links

Informative References

A few group pictures

[Some VCL students]
Shifu, Satyabrata, Emmanuel, Aaron, and Lucas at Aaron and Emmanuel's graduation ceremony; June 9, 2016.

[Some VCL students]
Brent, Aaron, Jon, and Emmanuel finishing up the KiloCore2 tapeout; March 1, 2015.

[Some VCL students]
Lucas, Aaron, Bevan, Zhibin, Jon, and Anh at Zhibin and Lucas' graduation ceremony; June 14, 2012.

[Some VCL students]
Aaron, Michael, Emmanuel, Jon, Anh, Samir, Zhibin, Brent, and Bin in the office-lab; April 4, 2012.

[Some VCL students]
Group dinner celebrating Jeremy, Lucas, and Trevin's graduations as well as Anh's best paper award and Bin's best paper nomination; January 25, 2012.

[Some VCL students]
Group lunch celebrating end of Spring quarter; June 10, 2009.

[Some VCL students]
Dean and Anh in office-lab; January 25, 2009.

[Some VCL students]
Dean, Zhibin and Paul in office-lab; March 27, 2008.

[Some VCL students]
Zhibin, Dean, Anh, Tinoosh, and Paul working on AsAP2 bringup; October 12, 2007.

[Some VCL students]
Tinoosh, Dean, and Zhibin working on AsAP2 bringup; October 11, 2007.

[Some VCL students]
Dean, Zhibin, Anh, Tinoosh, Paul, and Bevan at ECE Grad Student BBQ in Kemper courtyard; October 4, 2007.

[Some VCL students]
Toney, Wayne, Zhibin, Anh, Zhiyi, Tinoosh, Paul, Dean, and Bevan celebrating Toney's and Wayne's graduations at Woodstock's; August 29, 2007.

[Some VCL students]
Tinoosh, Dean, Christine, Wayne, and Zhiyi in Kemper 2211; November 8, 2006.

[Some VCL students]
Ryan, Omar, Mike M., Zhiyi, Mike L., and Bevan near the quad after lunch; August 26, 2004.

ECE Dept. | UC Davis

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